no code implementations • 4 Dec 2023 • Lukas Steiner, Timo Lehnigk-Emden, Markus Fehrenz, Norbert Wehn
In this paper, we investigate triangular block interleavers for the aforementioned application and show that the standard mapping of symbols used for SRAMs results in low bandwidth utilization for DRAMs, in some cases below 50 %.
