no code implementations • 27 Jan 2022 • Ankita Paul, Shihao Song, Twisha Titirsha, Anup Das
Our analysis show both a strong dependency on model characteristics such as synaptic activation and criticality, and on the voltage used to read resistance states during inference.
no code implementations • 16 Jun 2021 • Shihao Song, Twisha Titirsha, Anup Das
We propose an architectural solution to extend the read endurance of RRAM-based neuromorphic systems.
no code implementations • 4 May 2021 • Adarsha Balaji, Shihao Song, Twisha Titirsha, Anup Das, Jeffrey Krichmar, Nikil Dutt, James Shackleford, Nagarajan Kandasamy, Francky Catthoor
Recently, both industry and academia have proposed many different neuromorphic architectures to execute applications that are designed with Spiking Neural Network (SNN).
no code implementations • 22 Mar 2021 • Twisha Titirsha, Shihao Song, Adarsha Balaji, Anup Das
Based on such formulation, we first evaluate the role of a system software in managing the energy consumption of neuromorphic systems.
no code implementations • 9 Mar 2021 • Twisha Titirsha, Shihao Song, Anup Das, Jeffrey Krichmar, Nikil Dutt, Nagarajan Kandasamy, Francky Catthoor
We propose eSpine, a novel technique to improve lifetime by incorporating the endurance variation within each crossbar in mapping machine learning workloads, ensuring that synapses with higher activation are always implemented on memristors with higher endurance, and vice versa.
no code implementations • 9 Oct 2020 • Twisha Titirsha, Anup Das
Such current variations create a thermal gradient within each crossbar of the hardware, depending on the machine learning workload and the mapping of neurons and synapses of the workload to these crossbars.
no code implementations • 26 Sep 2020 • Twisha Titirsha, Anup Das
A major source of voltage drop in a crossbar of these architectures are the parasitic components on the crossbar's bitlines and wordlines, which are deliberately made longer to achieve lower cost-per-bit.